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Course Description



Quality labelled course   

DSP and Communication Processor Design


Date: from 24 Feb 2000 to 1 Mar 2000

Duration 5 day(s)

Language English    Venue London, UK

Country 

Course fee 850,00    Currency UKŁ    Discount 20%

Description
The massive advancement and explosion in the communications systems sector is largely owed to the
breathtaking developments in the integration of complex DSP algorithms onto silicon, with much
reduced size, power consumption, cost and increased reliability.
This course pulls together the expertise and know-how required realize such processors.
Participants of the course will be able to specify, design and silicon integrate DSP and Communication
Systems.

Course Contents and Time Table
Day 1:
Design methodology for DSP systems. Overview of discrete-time signal processing concepts &
terminology. Signed-logic terminology. FIR & IIR filter structures. Hands-On : writing high-level code
(MATLAB) to implement TDL and TDA FIR & IIR structures. Special-purpose high-speed
low-complexity filter structures. Hands-On : design & SIMULINK implementation of allpass-based
lowpass filter. Filter architectures.

Day 2:
Hands-On : writing high-level code (MATLAB) to implement in-place addressing for TDL & TDA
structures. Timing and filter architectures for recursive filter implementations. Timing - single and
two-phase clocking. Controller architectures. Hands-On : controller design and synthesis. Overflow
strategies. Hands-On : gain normalisation. Coefficient quantisation.

Day 3:
Hands-On : coefficient quantisation. A/D quantisation. Datapath quantisation: rounding techniques limit
cycles quantisation noise. Hands-On : quantisation noise estimation and filtering. Case Studies:
Allpass polyphase IIR decimator, Sigma-delta converters. Case Studies: Complex FFT processor.
Hands-On : group design of a special-purpose processor architecture.

Day 4:
Hands-On Cont’d: group design of a special-purpose processor architecture. Group presentation of
special-purpose processor design. Arithmetic processing. Serial multiplier implementation Booth`s
algorithm. Hands-On Session: design of an FIR filter using serial multiplication. Floating-point
processors, IEEE-754 standard , floating point vs. fixed-point processing for DSP. Advantages &
disadvantages of DSP core processors vs. custom processors

Audience
- DSP specialists wishing to realise algorithms on silicon.
- VLSI design engineers involved in the design of DSP & Communication systems.
- Academics in Electronics and Computer Science.
- Analog circuit designers wishing to learn about DSP Processor design.

Lecturers
Dr Izzet Kale, is a Reader in Advanced DSP Systems, in the Applied DSP & VLSI Research Group &
teaches DSP & VLSI, with experience in custom DSP, Communications & Sigma-Delta modulator
processor based system designs.

Dr Dik Morling, is the Chair of Electronic Systems at the University of Westminster & lectures on VLSI
& DSP topics. He is an experienced designer of Digital Signal Processors, particularly for mobile
communication applications.

Guest lectures are presented by specialists from within the Centre.

Further information
TWI, Nihal Sinnadurai Phone: +44 1223 891162 Fax: +44 1223 892588 Email: nsinnadurai@twi.co.uk

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