Course Description

Duration 2 day(s)

Language English    Venue Ramsbury, Wiltshire UK

Country 

Course fee 650,00    Currency UK£    Discount 30% Discount Europractice

Description
Overview:

This two day workshop is designed for engineers who are new to using Xilinx FPGAs. Based upon Xilinx`s own training materials, the workshop covers designand implementation techniques with the Foundation software implementation tools along with a detailed study of Xilinx`s Virtex FPGA architecture.

Course Contents and Time Table
Detailed Course Agenda:

Day 1

Introduction to Xilinx Products
Virtex Architecture
The Select I/O and its Applications
Delay Locked Loop (DLL) Usage and Applications
RAM Resources and Applications
Routing Resources
Reduction in routing congestion
IO interconnect and internal buses

Day 2

Xilinx Tool Flow
Overview of the Xilinx Tool Flow
Implementation and the Flow Engine
Interpreting Reports
Global Timing Constraints
Introduction to the Timing Analyzer
LogiBLOX and the Core Generator
Implementation Options
Re-entrant Routing and Multi-Pass Place and Route
Viewing Your Design with the Floorplanner
The FPGA Configuration Process


Workshop Labs:
The labs will get you familiar with the implementation/synthesis and timing analysis tools involved in the creation of a basic Virtex design.
The lab sessions also include Timing Constraint and Implementation Option exercises

Audience
The workshop is designed for:

- Engineers who will use Xilinx Virtex technology in real design projects

Prerequisites:

- Knowledge of issues in digital hardware design
- No previous Xilinx device knowledge is required
- No previous VHDL or Verilog experience is required

Further information
Esperan
Unit 1 Hilldrop Lane
Ramsbury
Wiltshire
SN8 2RB
UK

Tel +44(0)1672 520101
Fax +44(0)1672 521039

Email info@esperan.com