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Course Description



Quality labelled course   

Allegro Design Entry HDL


Date: from 26 Nov 2007 to 28 Nov 2007

Duration 3 day(s)

Language English    Venue Bracknell, UK

Country 

Description
The main goal of this course is to teach you how to use Design Entry HDL to create board-level schematic designs. A second goal is to demonstrate the integration between Design Entry HDL and other tools in the design flow, including the PCB Editor. You will follow the actual design flow by creating a schematic and taking it all the way through board layout.

In this course you will learn to:

* Set up a new project.
* Create a flat, multi-sheet design.
* Check the design.
* Use part tables.
* Package a design.
* Create and customize a Bill of Materials.
* Build a hierarchical design.
* Use schematic properties to control part placement and routing in Allegro PCB Editor and Router.
* Use the Constraint Manager to define high-speed routing requirements in Design Entry HDL.
* Transfer the design to PCB Editor.
* Place parts manually.
* Autoroute using PCB Router.
* Compare the schematic and layout.
* Synchronize design differences.
* Incorporate engineering changes.
* Examine an advanced case study.

Course Contents and Time Table
Day 1

* Getting Started
* Project Setup
* Design Entry and Packaging
* Introduction to Board Layout

Day 2

* Hierarchical Design
* Design Rules
* Transfer to the PCB Editor

Day 3

* Engineering Changes
* Advanced Case Study

Special Notes

This class does not teach you how to build Design Entry HDL library parts.

This class does not contain an in-depth study of the board layout process using PCB Editor, nor does it cover analog or digital logic simulation.

This course does not include the use of high-speed physical analysis tools such as the Allegro PCB SI product.

This class is usually scheduled the first part of the week (Mon - Wed), followed by the two-day Allegro PCB Librarian course (Thur - Fri). If you need to learn how to build schematic parts, we encourage you to enroll in both classes during the same week.

Audience
* Design engineers
* PCB designers
* PCB layout designers
* Electrical engineers
* Managers
* Logic designers using the Design Entry HDL product as the front-end tool for board design
* Design Entry HDL users interested in learning about the Design Entry HDL architecture
* Physical layout designers wanting to know more about mainstream board design processes using the Design Entry HDL product

Prerequisites

* There are no prerequisites for this course.

It is recommended that you take this course and also the Allegro PCB Librarian course together during the same week. See Special Notes section below.

* Some familiarity with Windows or UNIX is helpful.

Lecturers
Cadence staff is responsible for customer training, many instructors have advanced degrees in either education or engineering as well as practical knowledge of the software and curriculum development. Technical Service Engineers also teach classes and draw on their experience by helping designers in the field.

Further information
Mr Antoine Chevalier
Position: Education Service Operational Mgr
Telephone: +33 134 88 53 48
Fax: +33 1 34 88 53 51
Email: antoine@cadence.com

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