Course Description

Duration 5 day(s)

Language English    Venue IMEC, Belgium

Country 

Course fee 250,00    Currency EURO    

Description
Analog circuit design simulation and layout for 90nm and below.
The 5-day Advanced Analog Implementation Flow course will start with a short overview of the 90nm IC process flow, it will cover modelling issues, hand calculation versus simulation accuracy, transistor level and behavioral level design, analog cell trimming using digital functions, mixed mode simulation, mismatch and yield modelling and analysis, and analog modelling and circuit optimisation.

Course Contents and Time Table
DAY 1

LECTURE 1 : TECHNOLOGY ASPECTS IN 90NM ANALOG
ABDELKARIM MERCHA, BERTRAND PARVAIS ? IMEC
This part contains a schematic overview of a typical 90nm process-flow, high-lighting differences between previous generation CMOS and 90nm. Special attention goes to active, poly and metal tiling, and the limitations in the metallization from the requirements on uniform metal density
(cheesing). Impact of metal tiling and cheesing on inductor design will be discussed.

LECTURE 2 : MODELLING ISSUES
JEAN-MICHEL SALLESE ? EPFL
? Specific 90nm physical effect (DIBL, gate current, mobility saturation, velocity saturation).
Available models overview: BSIM4, EKV3, PSP.
? Modelling versus analog parameters:
? The pinch-off surface potential and the inversion factor parameter
? Threshold voltage and slope factor
? gm/ID & intrinsic gain behaviour
? CV modelling
? Noise modelling
? Gate leakage
? Voltage gain


DAY 2

LECTURE 3 : HANDS-ON EVALUATION VERSUS SIMULATION ACCURACY
MAHER KAYAL ? EPFL
? Approximations for hand calculations ? hierarchical model structure without loss of accuracy
? Parameters extraction flow for hand-calculations in 90nm node
? Design evaluation issues of the output conductance and the Intrinsic capacitances
? Simulation issues (accuracy, corners, etc)
? Optimization flow strategies and interaction with simulator
? Design verification and fine-tuning

LAB 1 : HANDS-ON EVALUATION VERSUS SIMULATION ACCURACY
MAHER KAYAL + MARC PASTRE ? EPFL
Hands-on tools required: Spice simulator


DAY 3

LECTURE 4 : TRANSISTOR LEVEL AND BEHAVIOURAL LEVEL DESIGN
MAHER KAYAL ? EPFL
? Structured analog design flow
? Basic analog structures library
? Basic analog structures classifications ? behavioural model definition
? Behavioural model and system level simulations ? specifications extraction
? Design trade-offs on the level of basic analog structures
? Design sequence and procedural design flow concept

LAB 2 : TRANSISTOR LEVEL AND BEHAVIOURAL LEVEL DESIGN
MAHER KAYAL + MARC PASTRE ? EPFL
Hands-on tools required: Spice simulator.

LECTURE 5 : ANALOG CELLS TRIMMING USING DIGITAL FUNCTIONS
MARC PASTRE ? EPFL
?Calibration principle
?Detection of imperfections (such as offset)
?Compensation of imperfections
?Calibration elements (DAC & algorithm)
?Calibration loop modelling
?Integration in the conventional simulation flow


DAY 4

LAB 3 : MIXED MODE DESIGN AND ITS SIMULATION METHODOLOGY
MAHER KAYAL + MARC PASTRE ? EPFL
Hands-on tools required : Spice simulator

LECTURE 6: MISMATCH AND YIELD MODELLING AND ANALYSIS
GEORGES GIELEN ? KU LEUVEN ? Mismatch and variability analysis : physical phenomena, models, comparison to older tech nologies, layout issues
? Techniques for mismatch and yield analysis ? Signal integrity in mixed-signal SoCs :
? Substrate noise evaluation and simulation
? Power supply noise evaluation and simulation
? Noise reduction and shielding techniques (Layout level)


DAY 5

LECTURE 7: ANALOG MODELLING AND CIRCUIT OPTIMIZATION
GEORGES GIELEN ? KU LEUVEN
? Analog behavioural modelling; behavioural modelling techniques
? Analog circuit optimization: degrees of freedom,optimization formulation, circuit optimization methods.

LAB 4 : ANALOG CIRCUIT OPTIMIZATION AND LAYOUT
MAHER KAYAL ? EPFL
Hands-on tools required :Tools for simulation, circuit optimization and layout

Audience
The course targets Professors, Post-docs and PhD students involved in the lectures and lab exercises in the European academia with engineering master curricula.

Lecturers
ABDELKARIM MERCHA, BERTRAND PARVAIS — IMEC
JEAN-MICHEL SALLESE, MAHER KAYAL — EPFL
GEORGES GIELEN — KU LEUVEN

Further information
idesa@rl.ac.uk